Monthly output of 3-nanometer chips at Taiwan's TSMC, the world's largest contract chipmaker, is expected to rise about 70% over 18 months. With orders roughly secured for 2029 through 2030, the company is moving quickly to add production lines.
Taiwanese media including United Daily News reported on the 14th, citing sources, that TSMC has begun expanding output of 2-nanometer and 3-nanometer products on the back of surging global demand for artificial intelligence chips. The sources said TSMC has disclosed its output expansion targets for next year to customers seeking chip supply.
At its second-quarter earnings call in mid-July, TSMC said demand for AI chips built on advanced processes was very strong and that contracts with major customers and cloud service providers continued to grow, giving it order visibility already secured for 2029 through 2030. At the same briefing, TSMC raised its annual capital spending outlook to between $60 billion and $64 billion (about 80.6 trillion to 86 trillion won) from the previous range of about $50 billion. It said roughly 70% to 80% of that would be allocated to advanced processes.
According to the sources, monthly output of 3-nanometer wafers, for which market demand is strong, will climb from 120,000 to 130,000 units at the end of last year to 180,000 units by the end of this year, with a target of 210,000 units by the middle of next year, an increase of more than 16%. Monthly output of the most advanced 2-nanometer process is set to reach 90,000 units by the end of this year and 110,000 units by the middle of next year, up about 22%. The sources projected that both capital spending for the capacity expansion and next year's revenue would set record highs.
To meet market demand for 3-nanometer products, TSMC is building additional wafer plants in Taiwan, Arizona and Japan while converting some 5-nanometer equipment lines to 3-nanometer. Following the successful development of angstrom-class 1.6-nanometer process chips, it is also pursuing 1.4-nanometer, 1.3-nanometer and 1.2-nanometer technologies. To that end, it is said to be working with ASML, the world's largest maker of lithography equipment, to adopt 12-inch photomasks.
Advanced packaging is expanding as well. Taiwanese media reported that TSMC is expanding capacity at its Chiayi AP7 plant and building advanced packaging capabilities in Arizona to meet demand for chip-on-wafer-on-substrate, or CoWoS, technology from AI chip leader Nvidia and others. Monthly output is to reach 260,000 units by the end of 2028.
